Proposal of Silicon on Insulator Reach through APDs for Soft X-ray Imaging Optimized by TCAD Simulation

We have been developing a soft X-ray imager called as Silicon on Insulator-Reach ThroughAvalanche Photo Diode aiming at application to the surface analysis and spintronics. In order to detect the low energy soft X-rays, the imager employs a full depletion and back-side illumination sensor with a high resistivity floating zone grown Si wafer. Thus, a multiple high-energy implantation and rapid thermal annealing process is newly adopted instead of a conventional process to eliminate slip generation during the high temperature annealing. The process condition optimization was done by using technology computer aided design (TCAD) regarding gain and noise performance. The optimized process conditions are obtained by making a flat boron concentration of multiplication region. The optimized APD has 55 in gain and 0.13 in k-factor which satisfies the sensor requirement for the soft X-ray analysis.


Introduction
Recently, fluorescence X-ray Absorption Fine Structure (XAFS) analysis using soft X-rays has been developed for surface and depth spin state analysis in thin magnetic films for spintronics [1] [2]. In this analysis, the sensor with high spatial resolution and high sensitivity of the soft X-ray is required to get accurate spin state depth profile. To satisfy the requirement, we are developing a new soft X-ray imaging detector called as Silicon on Insulator-Reach Through-Avalanche Photo Diode (SOI-RT-APD). In order to obtain the high spatial resolution, small pixel size with high fill factor of sensor can be achieved by the SOI structure owing to the circuit stacking capability on the sensor. Because the soft X-ray penetration depth in Si is shallow, the back-side illumination is indispensable to eliminate deterioration of the X-ray owing to attenuation in the wiring layer in the case of frontside illumination. In addition, full depletion in the sensor must be achieved to detect the low energy X-ray. In order to achieve full depletion, a relatively high resistivity wafer, which is a floating zone (FZ) growth silicon wafer, is needed. With consideration of such structure, SOI wafer with the high resistivity handle wafer was selected. Because the numbers generated carriers by low energy soft Xray is small, the APD which has internal gain is suitable to detect weak signal. Generally, the high gain RT-APD is obtained by a deep P-well structure which is formed by an ion implantation and a high temperature annealing using furnace. However, it is well known that the high temperature annealing causes slips which are crystal defects when the wafer is FZ grown Si [3]. The crystal defects induce dark currents of the sensor. In this study, we proposed a multiple high-energy implantation and a rapid thermal annealing which has small thermal budget to eliminate the slips. The process condition optimization was done by technology computer aided design (TCAD) in terms of gain and noise characteristics of the SOI-RT-APD.

SOI-RT-APD
The schematic cross section of the developed SO-RT-ADP is shown in Fig. 1. Relatively high voltage bias for p-n junction (sensor) is applied to the back-side p+ region. Soft X-rays from the backside generate electron-hole (e-h) pairs in the vicinity of the back surface. The generated electrons drift toward the n+ sense node by the electric field in the depletion region because of the full depletion of the sensor. When the electrons reach the multiplication region in P-well, additional electron-hole pairs are generated by impact ionization. The number of generated electrons is linearly proportional to the injected electrons in linear mode operation. The generated electrons by the avalanche multiplication are collected in the n+ sense node. Because of the SOI structure, an amplifier can be embedded in each pixel on the sensor which can reduce the noise in the pixel. To get uniform avalanche gain, electric field at the edge of the n+ sense node is reduced by a junction termination edge (JTE).
In order to get the high performance SOI-RT-APD, we set the specifications for gain and noise; 10<gain<60 and k-factor<0.2. The k-factor is defined as the ratio of the impact ionization coefficients rates of electron and holes at maximum electric field [4]. Thus, the low k-factor shows less e-h pair generation by hole which results less noise.

SOI-RT-APD Process condition optimization by TCAD
In the SOI-RT-APD, multiple high-energy ion implantations and rapid thermal annealing are used to form the deep P-well instead of the ion implantation and the high temperature annealing using furnace. The APD structure for TCAD simulation is shown in Fig. 2. In the simulation, the high resistivity (∼6 kΩcm) silicon wafer is assumed as a starting material. Boron ions are implanted four times with energy of 300, 550, 850, and 1200 keV through 200 nm oxide to form the deep P-well. The energies of the four step implantations are selected to make the relatively flat concentration P-well profile with 2.5 µm in depth as explained in Fig. 3. After the 30 keV and 1×10 15 cm −2 phosphorus implantation for n+ sense node formation, the rapid thermal annealing for 60 s at 1050 is done to activate the implanted ions. Then, the wafer is thinned to 65 µm and back-side doping of boron is performed.
The process optimization was mainly focused on the dose of the four boron implantations. The split table of the simulation is shown in Table I. Because of the freedom of dose combination, five types of the P-well profiles; Type 1 (same dose), Type 2 (dose difference: 1×10 11 cm −2 ) , Type 2a (dose difference: 2×10 11 cm −2 ), Type 3 (1×10 11 cm −2 ), and Type 3a (dose difference: 2×10 11 cm −2 ) are evaluated. The minimum dose of the boron implantation is set to 1×10 11 cm −2 by considering the actual limitation of the implantation machines.
In order to calculate the avalanche multiplication, the Van Overstraeten model was employed [5]. The current-voltage characteristics were firstly obtained by the device simulator. The operation voltage of the APD is set to 10 V lower than breakdown voltage which is defined as the voltage when the current reaches 10 pA from I-V characteristics. The k-factor is calculated from the impact ionization coefficients of electrons or holes at the maximum electric field point. To calculate the gain, the transient analysis was done after putting average 275.5 e-h pairs at the soft X-ray absorption point. The gain is defined as the ratio between corrected charge at sense node by the transient analysis and the initial electron charge. All the simulation including process and device simulations are done by Sentaurus TCAD of the Synopsis Inc.
The simulation results are summarized in terms of the gain and k-factor in Fig. 4. As shown in the figure, only Type 1 structure has process widow to satisfy the requirement of the gain and k-factor. In the Type 2 and Type 2a, the k-factor was degraded. In the Type 3 and Type 3a, the gain and k-factor were out of requirements. These results are extremely helpful to consider the P-well design for the APD. We concluded, in this moment, that the optimized process conditions are obtained by using Type 1, which has a flat boron profile in the APD P-well. In addition, our proposed SOI-RT-APD can achieve the requirements of imager for soft X-ray analysis instead of conventional thermal diffused P-well APD.

Conclusion
We are developing a soft X-ray imager SOI-RT-APD with a new structure aiming at application to the surface analysis for science and spintronics. In the SOI-RT-APD, the multiple high-energy implantation and rapid thermal annealing instead of the conventional high temperature annealing using furnace is newly introduced to eliminate the slip generation. With using TCAD simulation, we optimized the P-well process conditions to meet the requirements of the gain and k-factor which is the indicator of the noise. The flat boron profile of the P-well achieves the APD high gain as 55 and low noise as 0.13 in k-factor.