The CLICTD Monolithic CMOS Sensor

CLICTD is a monolithic silicon pixel sensor fabricated in a modified 180 nm CMOS imaging process with a small collection electrode design and a high-resistivity epitaxial layer. It features an innovative sub-pixel segmentation scheme and is optimised for fast charge collection and high spatial resolution. The sensor was developed to target the requirements for the tracking detector of the proposed future Compact Linear Collider (CLIC). Most notably, a temporal resolution of a few nanoseconds and a spatial resolution below 7 microns are demanded. In this contribution, the sensor performance measured in beam tests is presented with emphasis on recent studies using assemblies with different thicknesses (down to 50 microns to minimize the material budget) and inclined particle tracks.


Introduction
The CLIC tracker detector (CLICTD) is a pixelated monolithic CMOS sensor featuring a high resistivity epitaxial layer and a small collection electrode for reduced sensor capacitance. CLICTD targets the requirements of next-generation tracking detectors developed for future Higgs factories such as the Compact Linear Collider (CLIC). CLIC is a concept for a linear electron-positron collider with centre-of-mass energies between 380 GeV and 3 TeV. The physics program comprises Standard Model top quark and precision Higgs physics as well as searches for Beyond Standard Model physics [1].
Physics-driven requirements and experimental conditions impose stringent requirements on the CLIC detector systems [2]. For the tracking detector, a spatial resolution of < 7 µm in the direction perpendicular to the magnetic field and a maximum material budget of 1-2 %X 0 are needed to achieve the required measurement accuracy. Additionally, a hit time tagging resolution of 5 ns is required to suppress out-of-time beam-induced background particles. An average power dissipation of 150mW/cm 2 should not be exceeded to allow for a low-mass leak-less water cooling system. Finally, the hit detection efficiency should surpass 99.7 %.
Monolithic CMOS silicon sensors are considered promising candidates for the large-area tracking detector due to their low material budget and large-scale production capabilities. In particular, monolithic sensors with a small collection diode have shown to profit from a low detection threshold and a high signal-to-noise ratio [3]. Sensor processes optimised for prompt charge collection have been designed [4] and successfully tested with regard to radiation hardness [5], high efficiency and fast charge collection [6].
In this document, the performance of the monolithic small collection diode CMOS sensor CLICTD is presented. Most notably, the effect of different sensor bias voltages on the performance is investigated and the active depth of the sensor is studied with inclined particle tracks. Moreover, the performance of CLICTD assemblies thinned down to 50 µm is evaluated.

The CLICTD Monolithic Sensor
CLICTD is a pixelated monolithic high-resistivity CMOS sensor with an active matrix of 16 x 128 detection channels, each measuring 300 µm × 30 µm. In the following, the sensor process and the front-end design are outlined.

Sensor process
CLICTD is fabricated in two different variants of a modified 180 nm CMOS imaging process [7], which are shown in Fig. 1. In both process variants, a small n-type collection electrode is placed on top of a high-resistivity p-type epitaxial layer with a thickness of 30 µm. The epitaxial layer is grown on top of a highly doped p-type backside substrate. The analogue and digital on-channel circuitry is placed on deep p-wells to shield them from the electric field inside the sensor. Additionally, the sensor is shielded from the fast-switching circuitry that can act as a noise source. The reverse bias voltage, which is limited to -6 V, is applied to the substrate and the p-wells. The applied bias voltage suffices to achieve full lateral depletion in the epitaxial layer due to the introduction of an n-type implant below the p-wells [7]. For lower absolute bias voltages, the sensor is not fully depleted around the small collection diode, which leads to a higher sensor capacitance [8].
In a second process variant, the n-type implant is segmented, as illustrated on the right-hand side of Fig. 1. The segmentation gives rise to an increase in the lateral electric field, which accelerates charge collection and suppresses the motion of charge carriers to neighbouring pixel cells (inhibited charge sharing) [4]. In CLICTD assemblies with segmented n-implant, the segmentation is only applied in the column direction since charge sharing in the row direction is desired to improve the spatial resolution.

Analogue and digital front-end
The elongated 300 µm × 30 µm detector channels are segmented into eight sub-pixels along the 300 µm dimension. Each sub-pixel is equipped with its own collection diode and analogue front-end. The eight sub-pixel outputs are combined with an OR gate in the shared digital logic of a channel [8]. This front-end scheme allows to save space for the digital circuitry without interfering with the small collection diode design.
CLICTD is able to perform simultaneous timing and energy measurements. For the timing measurement, the Time-of-Arrival (ToA) is recorded in 10 ns bins. For the energy measurement, the Time-over-Threshold (ToT), defined as the number of clock cycles the signal is above the detection threshold, is recorded. As a consequence of the combination of sub-pixel measurements in a channel, the ToA is set by the sub-pixel with the earliest time-stamp. The ToT is set by the sub-pixel with the highest signal in case only one particle is measured or the total number of clock cycles during which at least one sub-pixel is above threshold for multiple discrete hits. The binary sub-pixel hit pattern is recorded as well.
The propagation of charge carriers to adjacent sub-pixels can lead to the activation of multiple sub-pixels in a channel. Therefore, the reduction of charge sharing for the process with the gap in the n-layer is advantageous to suppress the response of more than one sub-pixel per channel.

Performance in Particle Beams
The performance of CLICTD has been studied at the DESY II test-beam facility [9] using a EUDET-type beam telescope [10], with an additional Timepix3 plane [11] serving as a timing reference. The offline analysis of the test-beam data is performed with the test-beam reconstruction framework Corryvreckan [12]. In the following sections, selected results with a focus on different reverse bias voltages are presented.
The reverse bias voltage applied to CLICTD has an effect on the sensor as well as on the front-end performance: On the one hand, the operation of the front-end is more challenging at high absolute bias voltages due to a slow-down of the on-channel NMOS transistors [8]. On the other hand, the sensor performance improves for high absolute bias voltages, according to 3D TCAD simulation studies [4]: At lower bias voltages, the sensor area around the collection diode is not fully depleted leading to a higher sensor capacitance, as explained in Section 2. A lower capacitance leads to reduced noise while enhancing the signal, which makes it possible to operate the sensor at a lower detection threshold. In laboratory studies, a minimum operation threshold of approximately 140 e − at the highest possible bias voltage −6 V/ − 6 V, for substrate/p-wells has been identified. For a lower absolute bias voltage of −3 V/ − 3 V, the minimum threshold rises by approximately 40 % to 200 e − , indicating that the improvement of the sensor performance outweighs the limitations of the front-end at high absolute bias voltages [8].
The detection threshold has a critical impact on the performance of CLICTD, as illustrated in Fig. 2, where the mean cluster size in row direction for an assembly with continuous n-layer is shown as a function of the threshold. The mean row cluster size decreases rapidly for increasing thresholds before it starts to converge to a size of one. The initial sharp decline implies that a small change in threshold has an appreciable impact on the cluster size. While the cluster size for a given threshold is barely affected by the difference in bias voltage, the different operational thresholds are responsible for the higher achievable cluster size at higher absolute bias voltages. The mean cluster size in row direction for −6 V/ − 6 V is 1.49 at the minimum threshold of 140 e − and 1.
The spatial resolution is strongly correlated with the cluster size, as shown in Fig. 3 for the same assemblies. A high cluster size improves the position reconstruction owing to charge weighted position interpolation. Consequently, the declining cluster size for higher thresholds is accompanied by a degradation in the spatial resolution. At the minimum threshold, the spatial resolution is 4.6 µm for −6 V/ − 6 V and 4.8 Further studies at −6 V/ − 6 V have shown that a timing resolution of 5.8 ns and an efficiency of >99.8 % can be achieved [6], which fulfil the performance requirements of the tracking detector. In the following sections, the bias voltage is fixed to −6 V/ − 6 V .

Estimation of Active Depth
The charge collection as a function of the sensor depth is studied with inclined particle tracks. By rotating the sensor in the particle beam, the amount of active silicon crossed by beam particles can be varied. For high rotation angles, particle tracks traverse several adjacent pixel cells, which gives rise to a larger cluster size, as can be observed in Fig. 4, where the cluster size distribution for two different rotation angles is shown for an assembly with continuous n-layer. On the left-hand side, the cluster size in the tilted direction is depicted. The cluster size increases considerably since particles deposit energy in a line of multiple adjacent pixel cells. In the perpendicular dimension, which is shown on the right, a small increase in cluster size can be seen. The increase can be explained by the higher total energy deposition that enhances charge sharing in both spatial dimensions.
From geometrical considerations, the cluster size in the spatial dimension that is titled can be related to the incident angle α and the active sensor depth d, as sketched in Fig. 5. Charge carriers that are created below the active depth do not contribute to the measured signal. Therefore, the mean cluster size in the titled direction (column direction) can be expressed as: where the offset s 0 is the cluster column size for no rotation (α = 0). This simple geometrical model neglects non-rotation induced charge sharing, i.e. charge sharing via pixel crosstalk or diffusion is not accounted for. Contrary to the model assumptions, the diffusion effect plays a dominant role in the cluster size distribution for small rotation angles, as illustrated in the in-pixel cluster column size in Fig. 6. In this representation, the cluster column size is plotted as a function of the track incident position in a pixel cell. On the left, the in-pixel cluster column size at α = 5 • is depicted for an assembly with continuous n-layer. For incident positions in the pixel centre, the size is close to one, as expected for no charge sharing. In the pixel edges, the cluster size increases owing to charge sharing via diffusion. No significant rotation effects on the cluster size are observed at such a small angle.
For higher incident angles, the rotation-induced charge sharing dominates, as shown on the right of Fig. 6 for a rotation angle of α = 60 • . While particles that impinge on the pixel edges deposit most of their energy in the active region of a two pixels, an incident point in the pixel centre allows energy to be deposited in the active region of more than two cells, as sketched on the right of Fig. 5. It should be noted that the in-pixel track intercept position for inclined tracks does not correspond to the intersection of the track with the sensor surface. In order to comply with the definition of the reconstructed cluster position, which is calculated with a charge-weighted centre-of-gravity algorithm, the intersection of the track with the sensor is in the central region of the active silicon traversed by the beam. The exact location of the track intercept with the sensor is determined in the offline alignment procedure, where the detector position is reconstructed such that the spatial residuals between track position and reconstructed cluster position are minimized. In Fig. 5, the track position is approximated by a star. Consequently, the left track in the schematic is associated with a hit in the pixel edge and the right track in the pixel centre. For the calculation of the active depth with Eq. 1, the incident angles are required to be above 20 • to ensure that the main contribution to the cluster size is the rotation-induced charge sharing. In Fig. 7, the mean cluster size in column direction as a function of the tangent of the incident angle is depicted for an assembly with continuous n-layer and 50 µm thickness. Eq. 1 is fitted to the curve, yielding an active depth of d = (29.8 + 0.9 − 1.0) µm. The uncertainty is estimated by refitting Eq. 1 with varied fit ranges. The active depth d corresponds to the thickness of the epitaxial layer. From 3D TCAD simulations, the depletion depth is expected to be approximately 23 µm, which implies that charge carriers created below the depletion zone can diffuse into the high electric field regions and contribute to the measured signal.  The analysis has been repeated with assemblies of both process types and with sensor thicknesses between 300 µm and 50 µm. The result for the active depth varied within the uncertainties, which indicates that the sensitive sensor depth is largely unaffected by the thinning process.

Summary and Outlook
Characterisation results of the monolithic CMOS sensor CLICTD in beam tests have been presented with focus on different operation voltages and inclined particle tracks. It has been shown that a higher absolute bias voltage allows for operation at a lower detection threshold, which has an impact on the overall detector performance. The lower threshold improves the spatial resolution from 4.8 µm at 200 e − to 4.6 µm at 140 e − . Moreover, a timing resolution of 5.8 ns has been achieved, together with a hit detection efficiency of >99.7 %.
The active sensor depth has been determined with inclined particle tracks. Regardless of the process variant and the total sensor thickness (in the range of 300 µm to 50 µm), an active depth of approximately 30 µm has been found.
It was shown that the CLIC tracking detector requirements are fulfilled in terms of timing and spatial resolution as well as efficiency and material budget. The power consumption of CLICTD is also in line with the tracking detector requirements, as has been presented elsewhere [8]. Moreover, the results are relevant for future detector upgrades of e.g. the ALICE [14] and ATLAS [15] experiment at CERN since CLICTD serves as a test-vehicle for studying the 180 nm and 65 nm CMOS processes chosen for the small collection electrode design.
The characterisation of CLICTD assemblies fabricated on high resistivity Czochralski wafers, which allow for a thicker active layer, are foreseen for the future. In addition, the test-beam results will be complemented with Monte Carlo-based simulation studies.